PCIe
PCI Express (PCIe) technology is the critical high-speed serial bus in servers, due to its high-bandwidth and low-latency characteristics. PCIe architecture is widely used in various hardware interconnects: CPU to GPU, CPU to network interface card (NIC), CPU to accelerator, CPU to SSD, etc.. iPasslabs provides PCIe Compliance test services, from 1.0 to the newest 5.0, as well as is one committee of serial enabling: PCI-SIG working group, has held Gold Suites on quarterly compliance workshop since 2022. Our expert team is here to help customers navigate and troubleshoot the generations of PCIe architecture. Particularly, we are providing PCIe 5.0 protocol test service as our advantage, in addition to RX/TX/PLL solutions and PCIe 5.0 test fixtures.
PCIe
The following test summary are iPasslabs provides for PCIe solutions(keep updated):
Test services for PCIe 5.0
Add In Card:
- PLL Loop Bandwidth
- Transmitter Jitter
- PCI Express 5.0 Transmitter Signal Quality
- PCI Express 5.0 Link Equalization Testing
- Configuration Space
- Link and Transaction Layer
- Lane margining
System:
- PCI Express 5.0 Transmitter Signal Quality
- PCI Express 5.0 Link Equalization Testing
- Ref Clock
- Configuration Space
- Interoperability Functional Testing
- Lane margining
Test services for PCIe 4.0
Add In Card:
- PLL Loop Bandwidth
- Pulsewidth jitter
- PCI Express 4.0 Transmitter Testing
- PCI Express 4.0 Link Equalization Testing
- PCI Express 4.0 De-emphasis Testing
- Configuration Space
- Link and Transaction Layer
- Interoperability Functional Testing
- Lane margining
System:
- PCI Express 4.0 Transmitter Testing
- PCI Express 4.0 Link Equalization Testing
- Configuration Space
- Interoperability Functional Testing
- Lane margining
| Revision | Max Data Rate | Encoding | Signaling | Solutions |
|---|---|---|---|---|
| PCIe 1.0 (2003) | 2.5 GT/s | 8b/10b | NRZ | TX/PLL |
| PCIe 2.0 (2007) | 5.0 GT/s | 8b/10b | NRZ | TX/PLL |
| PCIe 3.0 (2010) | 8.0 GT/s | 128b/130b | NRZ | RX/TX/PLL/Protocol |
| PCIe 4.0 (2017) | 16.0 GT/s | 128b/130b | NRZ | RX/TX/PLL/Protocol |
| PCIe 5.0 (2019) | 32.0 GT/s | 128b/130b | NRZ | RX/TX/PLL/Protocol |
| PCIe 6.0 (2023) | 64.0 GT/s | 1b/1b(Flit Mode) | PAM4 |
*the PCIe 5.0 Base Specification is backwards compatible with lower-speed PCIe Base Specifications.
Equipments
TX:
- Lecroy LABMASTER 10-50ZI-A
- Tektronix DPO70000SX
- Keysight UXR70G
Rx:
- Anritsu MP1900A 32G NRZ BERT
- Tektronix BERTScope BSX
- Anritsu MP1900A PAM4 BERT
Equipments
Protocol：
- Lecroy Summit T516 Protocol Analyzer
“The Summit T516 PCI Express (PCIe) 5.0 and Compute Express Link (CXL) Protocol Analyzer, the first protocol analyzer to capture x16 link width at 32GT/s for capturing, recording, and analysis of high performance devices and systems.”
Others：
- Tektronix MSO6-4G (Clock Measurement)
