Technical
Technical
PCIe
PCI Express (PCIe) technology is the critical high-speed serial bus in servers, due to its high-bandwidth and low-latency characteristics. PCIe architecture is widely used in various hardware interconnects: CPU to GPU, CPU to network interface card (NIC), CPU to accelerator, CPU to SSD, etc..
In June 2025, iPasslabs officially received approvement from PCI-SIG to become the PCIe Authorized Test lab, provide preliminary compliance test services (Pre Test) for PCIe 1.0 up to the latest generation PCIe 6.0, as well as official compliance test for PCIe 4.0 & 5.0. iPasslabs is also a working committee of the PCI-SIG serial enabling working group and the designated Gold Suite partner for PCI-SIG's quarterly Compliance test workshops.
Ethernet
IEEE 802.3ck Test Solution
Due to long-distance and high-speed data interconnection worldwide, that requires high efficiency, low latency and no signals loss. PAM4 is one of crucial technologies implementing in the industrials with decades to come, for example, PAM4 plays a key role in data centers and cloud computing environments to support the high-bandwidth requirements of virtualization, storage, and processing. It helps optimize the efficiency and speed of data transfers within and between data centers.
AI Server Architecture Overview: CXL, DDR5, PCIe 6.0, and Ethernet
In response to the development trends of AI/Data center/HPC and other technology applications, server-related technologies are keeping pace to meet their high-speed computing and transmission requirements. The development goals are all directed at low latency, high reliability, and improved power efficiency. For example, CXL, which has been gaining attention recently, is used to overcome the limitations and low utilization of bandwidth available to server processors (CPUs) for interconnecting memory. The CXL protocol is designed for high-speed signal transmission applications to establish cross-chip memory interconnection and shared access modules to solve the current performance bottleneck between processors and memory in servers.
PCIe-CopprLink™
High speed cable solutions for PCIe 5.0/6.0
CopprLink™ is a cable specification developed by PCI-SIG to meet the industry's growing demand for high-speed data transmission. It is designed for internal and external cables supporting PCIe 5.0/6.0 technologies, providing signal transmission speeds of 32.0 GT/s and 64.0 GT/s. By combining PCIe with copper cables, CopprLink™ enables long-distance, low-latency high-speed signal transmission.
The most powerful AI computation cannot thrive without high-speed I/O: PCIe.
The generative AI race is driving an influx of powerful computing chips into the market. A prime example is the latest TPU Tensor Processor powering Google Gemini 3, which currently offers the highest efficiency for LLM training and inference—being faster, more cost-effective, and more energy-efficient.
However, PCIe plays an indispensable bridging role within the TPU system architecture.